SH7055S Datasheet, PDF (521/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 15.8 Serial Mode Register Settings and SCI Communication Formats
SMR Settings
Mode
Bit 7 Bit 6 Bit 5 Bit 2 Bit 3
C/A CHR PE MP STOP
Asynchronous 0
0
0
0
0
1
1
0
1
1
0
0
1
1
0
1
Asynchronous
(multiprocessor
format)
0
*
1
0
*
1
1
*
0
*
1
Synchronous 1
*
*
*
*
Note: Asterisks (*) in the table indicate donít-care bits.
SCI Communication Format
Data Parity Multipro- Stop Bit
Length Bit
cessor Bit Length
8-bit
Absent Absent 1 bit
2 bits
Present
1 bit
2 bits
7-bit
Absent
1 bit
2 bits
Present
1 bit
2 bits
8-bit
Absent Present 1 bit
2 bits
7-bit
1 bit
2 bits
8-bit
Absent None
Table 15.9 SMR and SCR Settings and SCI Clock Source Selection
SMR
SCR Settings
SCI Transmit/Receive Clock
Mode
Bit 7
C/A
Bit 1 Bit 0
CKE1 CKE0
Clock Source SCK Pin Function*
Asynchronous 0
0
0
Internal
SCI does not use the SCK pin
1
Outputs a clock with frequency
matching the bit rate
1
0
1
External
Inputs a clock with frequency 16
times the bit rate
Synchronous 1
0
0
1
Internal
Outputs the serial clock
or the inverted serial clock
1
0
1
External
Inputs the serial clock
or the inverted serial clock
Note: * Select the function in combination with the pin function controller (PFC).
Rev.2.0, 07/03, page 483 of 960