SH7055S Datasheet, PDF (811/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

(1) On-Chip RAM Address Map when Programming/Erasing is Executed
Parts of the procedure program that are made by the user, like download request,
programming/erasing procedure, and judgement of the result, must be executed in the on-chip
RAM. All of the on-chip program that is to be downloaded is in on-chip RAM. Note that on-
chip RAM must be controlled so that these parts do not overlap.
Figure 22.10 shows the program area to be downloaded.
Area to be
downloaded
(Size: 2 kbytes)
Unusable area in
programming/erasing
processing period
<On-chip RAM> Address
RAM emulation area RAMTOP (H'FFFF6000)
or area that can be
used by user
DPFR
FTDAR setting
(Return value: 1 byte)
System use area
(15 bytes)
Programming/
erasing entry
FTDAR setting+16
Initialization
process entry
FTDAR setting+32
Initialization +
programming program
or Initialization +
erasing program
Area that can be
used by user
FTDAR setting+2048
RAMEND (H'FFFFDFFF)
Figure 22.10 RAM Map after Download
Rev.2.0, 07/03, page 773 of 960