SH7055S Datasheet, PDF (502/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

• Bit 6—Character Length (CHR): Selects 7-bit or 8-bit data in asynchronous mode. In
synchronous mode, the data length is always eight bits, regardless of the CHR setting.
Bit 6: CHR
0
1
Description
Eight-bit data
(Initial value)
Seven-bit data
When 7-bit data is selected, the MSB (bit 7) of the transmit data register
is not transmitted. LSB-first/MSB-first selection is not available.
• Bit 5—Parity Enable (PE): Selects whether to add a parity bit to transmit data and to check the
parity of receive data, in asynchronous mode. In synchronous mode and when using a
multiprocessor format, a parity bit is neither added nor checked, regardless of the PE bit
setting.
Bit 5: PE
0
1
Description
Parity bit not added or checked
(Initial value)
Parity bit added and checked
When PE is set to 1, an even or odd parity bit is added to transmit data,
depending on the parity mode (O/E bit) setting. Receive data parity is
checked according to the even/odd (O/E bit) setting.
• Bit 4—Parity Mode (O/E): Selects even or odd parity when parity bits are added and checked.
The O/E setting is used only in asynchronous mode and only when the parity enable bit (PE) is
set to 1 to enable parity addition and checking. The O/E setting is invalid in synchronous
mode, in asynchronous mode when parity bit addition and checking is disabled, and when
using a multiprocessor format.
Bit 4: O/E
0
1
Description
Even parity
(Initial value)
If even parity is selected, the parity bit is added to transmit data to make
an even number of 1s in the transmitted character and parity bit
combined. Receive data is checked to see if it has an even number of
1s in the received character and parity bit combined.
Odd parity
If odd parity is selected, the parity bit is added to transmit data to make
an odd number of 1s in the transmitted character and parity bit
combined. Receive data is checked to see if it has an odd number of 1s
in the received character and parity bit combined.
Rev.2.0, 07/03, page 464 of 960