SH7055S Datasheet, PDF (53/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 1.2 Pin Functions (cont)
Type
Symbol
User break UBCTRG
controller (UBC)
High-
Performance
user debug
interface
(H-UDI)
TCK
TMS
TDI
Pin No.
159
236
232
234
TDO
235
TRST
233
Advanced
AUDATA0– 241–244
user debugger AUDATA3
(AUD)
AUDRST 238
AUDMD 240
AUDCK 245
AUDSYNC 246
I/O ports
POD
34
PA0–PA15
125, 127,
129–138,
140,
142–144
I/O
Name
Function
Output User break UBC condition match trigger
trigger output output pin.
Input Test clock
Test clock input pin.
Input Test mode
select
Test mode select signal input
pin.
Input Test data
input
Instruction/data serial input
pin.
Output Test data
output
Instruction/data serial output
pin.
Input Test reset
Initialization signal input pin.
Input/ AUD data
output
Realtime trace mode: Branch
destination address output
pins.
RAM monitor mode: Monitor
address input / data
input/output pins.
Input AUD reset
Reset signal input pin.
Input AUD mode Mode select signal input pin.
Realtime trace mode: Low
RAM monitor mode: High
Input/ AUD clock
output
Realtime trace mode: Serial
clock output pin.
RAM monitor mode: Serial
clock input pin.
Input/ AUD
Realtime trace mode: Data
output synchronization start position identification
signal
signal output pin.
RAM monitor mode: Data
start position identification
signal input pin.
Input Port output
disable
Input pin for port pin drive
control when general port is
set for output.
Input/ Port A
output
General input/output port pins.
Input or output can be
specified bit by bit.
Rev.2.0, 07/03, page 15 of 960