SH7055S Datasheet, PDF (286/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Timer I/O Control Register 11 (TIOR11)
TIOR11
Bit: 7
6
5
4
3
2
1
0
— IO11B2 IO11B1 IO11B0 — IO11A2 IO11A1 IO11A0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W
R
R/W R/W R/W
TIOR11 specifies whether general registers GR11A and GR11B are used as input capture or
compare-match registers, and also performs edge detection and output value setting.
TIOR11 is initialized to H'00 by a power-on reset, and in hardware standby mode and software
standby mode.
• Bit 7—Reserved: This bit is always read as 0. The write value should always be 0.
• Bits 6 to 4—I/O Control 11B2 to 11B0 (IO11B2 to IO11B0): These bits select the general
register (GR) function.
Bit 6:
IO11B2
0
1
Bit 5:
IO11B1
0
1
0
1
Bit 4:
IO11B0
0
1
0
1
0
1
0
1
Description
GR is an output
compare register
GR is an input
capture register
Compare-match disabled; pin output
undefined
(Initial value)
0 output on GR compare-match
1 output on GR compare-match
Toggle output on GR compare-match
Input capture disabled
Input capture in GR on rising edge at
TIO11B pin (GR cannot be written to)
Input capture in GR on falling edge at
TIO11B pin (GR cannot be written to)
Input capture in GR on both rising and
falling edges at TIO11B pin (GR cannot
be written to)
Rev.2.0, 07/03, page 248 of 960