SH7055S Datasheet, PDF (130/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

6.7 Stack Status after Exception Processing Ends
The status of the stack after exception processing ends is as shown in table 6.11.
Table 6.11 Stack Status After Exception Processing Ends
Exception Type
Address error
Stack Status
SP
Address of instruction
after executed instruction
32 bits
SR
32 bits
Trap instruction
SP
Address of instruction
after TRAPA instruction
32 bits
SR
32 bits
General illegal instruction
SP
Address of general
illegal instruction
SR
32 bits
32 bits
Interrupt
SP
Address of instruction
after executed instruction
32 bits
SR
32 bits
Illegal slot instruction
SP
Jump destination address
of delay branch instruction
32 bits
SR
32 bits
FPU exception
SP ^{AFPddUreesxsceopf} _{tiinosntriuncsttirounctaioftner32} bits
SR
32 bits
Rev.2.0, 07/03, page 92 of 960