SH7055S Datasheet, PDF (150/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

• Bits 7 to 0—IRQ0–IRQ7 Flags (IRQ0F–IRQ7F): These bits display the IRQ0–IRQ7 interrupt
request status.
Bits 7-0:
IRQ0F–IRQ7F
0
Detection Setting
Level detection
Edge detection
Description
No IRQn interrupt request exists
[Clearing condition]
When IRQn input is high
No IRQn interrupt request was detected (Initial value)
[Clearing conditions]
• When 0 is written after reading IRQnF = 1
1
Level detection
Edge detection
n = 7 to 0
• When IRQn interrupt exception processing has been
executed
An IRQn interrupt request exists
Setting condition: When IRQn input is low
An IRQn interrupt request was detected
Setting condition: When a falling edge occurs at an IRQn
input
Rev.2.0, 07/03, page 112 of 960