SH7055S Datasheet, PDF (606/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

initial setting for mailboxes is 0, designating transmission use. See Mailbox Transmit/Receive
Settings in section 16.3.2, Initialization after a Hardware Reset, for details.
5. Mailbox (RAM) initialization
As message control/data registers (MCx[x], MDx[x]) are configured in RAM, their initial
values after powering on are undefined, and so bit initialization is necessary. Write 0s or 1s to
the mailboxes. See Mailbox (Message Control/Data (MCx[x], MDx[x]) Initial Settings in
section 16.3.2, Initialization after a Hardware Reset, for details.
Rev.2.0, 07/03, page 568 of 960