SH7055S Datasheet, PDF (994/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Appendix B Pin States
Tables B.1, B.2, and B.3 show the SH7055SF pin states.
Table B.1 Pin States
Type Pin Name
Clock CK*²
XTAL
EXTAL
PLLCAP
System RES
control _FWE
HSTBY
MD0
MD1
MD2
WDTOVF
BREQ
BACK
Interrupt NMI
IRQ0 to IRQ7
IRQOUT
Address A0 to A21
bus
Data bus D0 to D7
D8 to D15
Bus WAIT
control _{WRH, WRL}
RD
CS0
CS1 to CS3
Port POD
ATU-II TI0A to TI0D
TIO1A to TIO1H
TIO2A to TIO2H
TIO3A to TIO3D
Pin State
Reset State
Power-Down State
Power-On
ROMless
Expanded Mode
8 Bits 16 Bits
Expanded Single-
H-UDI
Mode with Chip Hardware Software Module
ROM
Mode Standby Standby Standby
AUD
Module
Standby
Bus-
Released
State
O
Z
H*¹
O
O
O
O
L
L
O
O
O
I
Z
I
I
I
I
I
I
I
I
I
I
I
Z
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
Z
O*¹
O
O
O
—
Z
Z
I
I
I
—
Z
Z
O
O
L
I
Z
I
I
I
I
—
Z
Z
I
I
I
—
Z
O*¹
O
O
O
O
—
Z
Z
O
O
Z
Z
—
—
Z
—
I
H
H
H
—
—
—
—
—
—
Z
Z
—
Z
—
Z
—
Z
—
Z
Z
Z
Z
Z
Z
Z
Z
I/O
I/O
Z
Z
I/O
I/O
Z
Z
I
I
I
Z
O
O
Z
Z
O
O
Z
Z
O
O
Z
Z
O
O
Z
Z
I
I
I
Z
I
I
I
K*¹
I/O
I/O
I/O
K*¹
I/O
I/O
I/O
K*¹
I/O
I/O
I/O
Rev.2.0, 07/03, page 956 of 960