SH7055S Datasheet, PDF (725/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

20.3.19 Port J Control Registers H and L (PJCRH, PJCRL)
Port J control registers H and L (PJCRH, PJCRL) are 16-bit readable/writable registers that select
the functions of the 16 multiplex pins in port J. PJCRH selects the functions of the pins for the
upper 8 bits of port J, and PJCRL selects the functions of the pins for the lower 8 bits.
PJCRH and PJCRL are initialized to H'0000 by a power-on reset (excluding a WDT power-on
reset), and in hardware standby mode. They are not initialized in software standby mode or sleep
mode.
Port J Control Register H (PJCRH)
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
— PJ15MD — PJ14MD — PJ13MD — PJ12MD
0
0
0
0
0
0
0
0
R
R/W
R
R/W
R
R/W
R
R/W
Bit: 7
6
5
4
3
2
1
0
— PJ11MD — PJ10MD — PJ9MD — PJ8MD
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W
R
R/W
R
R/W
R
R/W
• Bit 15—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 14—PJ15 Mode Bit (PJ15MD): Selects the function of pin PJ15/TI9F.
Bit 14: PJ15MD
0
1
Description
General input/output (PJ15)
ATU-II event counter input (TI9F)
(Initial value)
• Bit 13—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 12—PJ14 Mode Bit (PJ14MD): Selects the function of pin PJ14/TI9E.
Bit 12: PJ14MD
0
1
Description
General input/output (PJ14)
ATU-II event counter input (TI9E)
(Initial value)
Rev.2.0, 07/03, page 687 of 960