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SH7055S Datasheet, PDF (12/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series
Item
11.3.9 PWM Timer Function
Figure 11.21 PWM Timer
Operation
11.3.9 PWM Timer Function
Figure 11.22 Complementary
PWM Mode Operation
Page Revisions (See Manual for Details)
366, Description amended
367 If the DTR value is H'0000, the output does not change
(0% duty). However, when H'0000 is set to DTR, do not
directly write H'0000 to DTR. Set H'0000 to BFR and
forward it from BFR to DTR. If H'0000 is directly set to
DTR, duty may not be 0%. A duty of 100% is specified by
setting DTR = CYLR. Do not set a value in DTR that will
result in the condition DTR > CYLR.
Figure amended
• TO6A amended
PWM output does not change for one cycle after
activation*
Note added
* PWM output is not guaranteed because retained
value is output for one cycle after activation.
368 Figure replaced
11.3.12 Channel 10 Functions 372
Inter-Edge Measurement
Function and Edge Input
Cessation Detection Function:
Figure 11.28 TCNT10A Capture
Operation and Compare-Match
Operation
11.7 Usage Notes
414
Contention between DCNT Write
and Counter Clearing by
Underflow:
Figure 11.72 Contention between
DCNT Write and Underflow
11.7 Usage Notes
418
ATU Pin Setting:
Figure amended
12345677
1234
5678
00000001
55555555
Note added
Figure amended
Underflow signal
DCNT 0001
H'5555 is written to the DCNT because
the write to the DCNT has priority
0000
5555
Description amended
When a port is set to the ATU pin function, the following
points must be noted because input capture or count
operation may occur.
17.4.2 Scan Mode
608 Figure amended
Figure 17.4 Example of A/D
Converter Operation(Scan
Mode(Single-Cycle Scan),
Channels AN0 to AN11 Selected)
ADST
Continuous A/D conversion
Set*
Clear
Rev.2.0, 07/03, page xii of xxxviii