SH7055S Datasheet, PDF (675/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

19.4 RAM Monitor Mode
19.4.1 Overview
In this mode, all the modules connected to the SH7055SF’s internal or external bus can be read
and written to, allowing RAM monitoring and tuning to be carried out.
19.4.2 Communication Protocol
The AUD latches the AUDATA input when AUDSYNC is asserted. The following AUDATA
input format should be used.
Input format
0000
DIR A3–A0 ^{. . . . . .} A31–A28 D3–D0 ^{. . . . . .} Dn–Dn-3
Command
Address
Data (in case of write only)
B write: n = 7
W write: n = 15
L write: n = 31
Bit 3
Bit 2
Fixed at 1 0: Read
1: Write
Bit 1 Bit 0
00: Byte
01: Word
10: Longword
Spare bits (4 bits): b'0000
Figure 19.4 AUDATA Input Format
Rev.2.0, 07/03, page 637 of 960