SH7055S Datasheet, PDF (735/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

20.3.23 Port L IO Register (PLIOR)
Bit: 15
—
Initial value: 0
R/W: R
14
13
12
11
10
9
8
—
PL13 PL12 PL11 PL10 PL9
PL8
IOR
IOR
IOR
IOR
IOR
IOR
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PL7
PL6
PL5
PL4
PL3
PL2
PL1
PL0
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port L IO register (PLIOR) is a 16-bit readable/writable register that selects the input/output
direction of the 14 pins in port L. Bits PL13IOR to PL0IOR correspond to pins PL13/IRQOUT to
PL0/TI10. PLIOR is enabled when port L pins function as general input/output pins (PL13 to
PL0), timer input/output pins (TIO11A, TIO11B), or serial clock pins (SCK2, SCK3, SCK4), and
disabled otherwise.
When port L pins function as PL13 to PL0, TIO11A and TIO11B, or SCK2, SCK3, and SCK4, a
pin becomes an output when the corresponding bit in PLIOR is set to 1, and an input when the bit
is cleared to 0.
PLIOR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby mode. It is not initialized in software standby mode or sleep mode.
Rev.2.0, 07/03, page 697 of 960