SH7055S Datasheet, PDF (542/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Transmitting and Receiving Data
SCI Initialization (Synchronous Mode): Before transmitting or receiving, software must clear
the TE and RE bits to 0 in the serial control register (SCR), then initialize the SCI as follows.
When changing the mode or communication format, always clear the TE and RE bits to 0 before
following the procedure given below. Clearing TE to 0 sets TDRE to 1 and initializes the transmit
shift register (TSR). Clearing RE to 0, however, does not initialize the RDRF, PER, FER, and
ORER flags and receive data register (RDR), which retain their previous contents.
Figure 15.18 is a sample flowchart for initializing the SCI.
1. Select the clock source in the serial control register (SCR). Leave RIE, TIE, TEIE, MPIE, TE,
and RE cleared to 0.
2. Select the communication format in the serial mode register (SMR) and serial direction control
register (SDCR).
3. Write the value corresponding to the bit rate in the bit rate register (BRR) (unless an external
clock is used).
4. Wait for at least the interval required to transmit or receive one bit, then set TE or RE in the
serial control register (SCR) to 1.* Also set RIE, TIE, TEIE, and MPIE. The TxD, RxD pins
becomes usable in response to the PFC corresponding bits and the TE, RE bit settings.
Note: * In simultaneous transmit/receive operation, the TE bit and RE bit must be cleared to 0 or
set to 1 simultaneously.
Rev.2.0, 07/03, page 504 of 960