SH7055S Datasheet, PDF (296/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

• Bit 7—Input Capture/Compare-Match Flag 2H (IMF2H): Status flag that indicates GR2H
input capture or compare-match.
Bit 7: IMF2H
0
1
Description
[Clearing condition]
(Initial value)
When IMF2H is read while set to 1, then 0 is written to IMF2H
[Setting conditions]
• When the TCNT2A value is transferred to GR2H by an input capture
signal while GR2H is functioning as an input capture register
• When TCNT2A = GR2H while GR2H is functioning as an output compare
register
• Bit 6—Input Capture/Compare-Match Flag 2G (IMF2G): Status flag that indicates GR2G
input capture or compare-match.
Bit 6: IMF2G
0
1
Description
[Clearing condition]
(Initial value)
When IMF2G is read while set to 1, then 0 is written to IMF2G
[Setting conditions]
• When the TCNT2A value is transferred to GR2G by an input capture
signal while GR2G is functioning as an input capture register
• When TCNT2A = GR2G while GR2G is functioning as an output compare
register
• Bit 5—Input Capture/Compare-Match Flag 2F (IMF2F): Status flag that indicates GR2F input
capture or compare-match.
Bit 5: IMF2F
0
1
Description
[Clearing condition]
(Initial value)
When IMF2F is read while set to 1, then 0 is written to IMF2F
[Setting conditions]
• When the TCNT2A value is transferred to GR2F by an input capture
signal while GR2F is functioning as an input capture register
• When TCNT2A = GR2F while GR2F is functioning as an output compare
register
Rev.2.0, 07/03, page 258 of 960