SH7055S Datasheet, PDF (550/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Initialization
1
Start of transmission/reception
Read TDRE bit in SSR
2
No
TDRE = 1?
Yes
Write transmit data in TDR
and clear TDRE bit in SSR to 0
Read ORER bit in SSR
ORER = 1?
No
Read RDRF bit in SSR
Yes
3
Error handling
4
No
RDRF = 1?
Yes
Read receive data in RDR,
and clear RDRF bit in SSR to 0 ⁵
All
No
data transmitted/
received?
Yes
Clear TE and RE bits in SCR to 0
End of transmission/reception
Figure 15.24 Sample Flowchart for Serial Transmission and Reception
Rev.2.0, 07/03, page 512 of 960