SH7055S Datasheet, PDF (144/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 7.3 Interrupt Exception Processing Vectors and Priorities (cont)
Interrupt Source
Interrupt Vector
Vector Table
Vector Address
No. Offset
Interrupt
Priority
(Initial
Value)
Priority
Corre- within IPR
sponding Setting
IPR (Bits) Range
ATU8 ATU84 OSI8M 164 H'00000290 to 0 to 15 (0) IPRH
↑
1
H'00000293
(3–0)
OSI8N 165 H'00000294 to
2
H'00000297
OSI8O 166 H'00000298 to
3
H'0000029B
OSI8P 167
H'0000029C to
H'0000029F
↓
4
ATU9 ATU91 CMI9A 168 H'000002A0 to 0 to 15 (0) IPRI
↑
1
H'000002A3
(15–12)
CMI9B 169 H'000002A4 to
2
H'000002A7
CMI9C 170 H'000002A8 to
3
H'000002AB
CMI9D 171
H'000002AC to
H'000002AF
↓
4
ATU92 CMI9E 172 H'000002B0 to 0 to 15 (0) IPRI
↑
1
H'000002B3
(11–8)
CMI9F 174
H'000002B8 to
H'000002BB
↓
2
ATU10 ATU101 CMI10A 176 H'000002C0 to 0 to 15 (0) IPRI
↑
1
H'000002C3
(7–4)
CMI10B 178
H'000002C8 to
H'000002CB
↓
2
ATU102 ICI10A/C 180
MI10G
H'000002D0 to 0 to 15(0) IPRI
H'000002D3
(3–0)
ATU11 IMI11A 184 H'000002E0 to 0 to 15 (0) IPRJ
↑
1
H'000002E3
(15–12)
IMI11B 186 H'000002E8 to
2
H'000002EB
OVI11 187
H'000002EC to
H'000002EF
↓
3
Default
Priority
High
Low
Rev.2.0, 07/03, page 106 of 960