SH7055S Datasheet, PDF (561/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

16.1.4 Register Configuration
Table 16.3 lists the HCAN’s registers.
Table 16.3 HCAN Registers
Chan-
nel Name
0
Master control register
General status register
Bit configuration register
Mailbox configuration
register
Transmit wait register
Transmit wait cancel
register
Transmit acknowledge
register
Abort acknowledge register
Receive complete register
Remote request register
Interrupt register
Mailbox interrupt mask
register
Interrupt mask register
Receive error counter
Transmit error counter
Unread message status
register
Local acceptance filter
mask L
Local acceptance filter
mask H
Abbre-
viation
MCR
GSR
BCR
MBCR
TXPR
TXCR
TXACK
ABACK
RXPR
RFPR
IRR
MBIMR
IMR
REC
TEC
UMSR
LAFML
LAFMH
R/W
R/W
R
R/W
R/W
Initial
Value
H'01
H'0C
H'0000
H'0100
Address
Access Size
H'FFFF E400 8 bits 16 bits
H'FFFF E401 8 bits
H'FFFF E402 8/16 bits
H'FFFF E404 8/16 bits
R/W H'0000
R/W H'0000
H'FFFF E406 8/16 bits
H'FFFF E408 8/16 bits
R/W H'0000 H'FFFF E40A 8/16 bits
R/W H'0000
R/W H'0000
R/W H'0000
R/W H'0100
R/W H'FFFF
H'FFFF E40C 8/16 bits
H'FFFF E40E 8/16 bits
H'FFFF E410 8/16 bits
H'FFFF E412 8/16 bits
H'FFFF E414 8/16 bits
R/W H'FEFF
R
H'00
R
H'00
R/W H'0000
H'FFFF E416 8/16 bits
H'FFFF E418 8 bits 16 bits
H'FFFF E419 8 bits
H'FFFF E41A 8/16 bits
R/W H'0000 H'FFFF E41C 8/16 bits
R/W H'0000 H'FFFF E41E 8/16 bits
Rev.2.0, 07/03, page 523 of 960