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SH7055S Datasheet, PDF (511/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series | |||
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⢠Bit 2âTransmit End (TEND): Indicates that when the last bit of a serial character was
transmitted, TDR did not contain valid data, so transmission has ended. TEND is a read-only
bit and cannot be written.
Bit 2: TEND
0
1
Description
Transmission is in progress
[Clearing conditions]
⢠When 0 is written to TDRE after reading TDRE = 1
⢠When the DMAC writes data in TDR
End of transmission
(Initial value)
[Setting conditions]
⢠Power-on reset, hardware standby mode, or software standby mode
⢠When the TE bit in SCR is 0
⢠If TDRE = 1 when the last bit of a one-byte serial transmit character is
transmitted
⢠Bit 1âMultiprocessor Bit (MPB): Stores the value of the multiprocessor bit in receive data
when a multiprocessor format is selected for receiving in asynchronous mode. MPB is a read-
only bit and cannot be written.
Bit 1: MPB
0
1
Description
Multiprocessor bit value in receive data is 0
(Initial value)
If RE is cleared to 0 when a multiprocessor format is selected, the MPB retains
its previousâ value.
Multiprocessor bit value in receive data is 1
⢠Bit 0âMultiprocessor Bit Transfer (MPBT): Stores the value of the multiprocessor bit added
to transmit data when a multiprocessor format is selected for transmitting in asynchronous
mode. The MPBT setting is ignored in synchronous mode, when a multiprocessor format is not
selected, or when the SCI is not transmitting.
Bit 0: MPBT
0
1
Description
Multiprocessor bit value in transmit data is 0
Multiprocessor bit value in transmit data is 1
(Initial value)
Rev.2.0, 07/03, page 473 of 960
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