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SH7055S Datasheet, PDF (44/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series | |||
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Table 1.1 SH7055SF Features (cont)
Item
Advanced user
debugger (AUD)
I/O ports
(including timer
I/O pins, address
and data buses)
ROM
RAM
Features
⢠Eight dedicated pins
⢠RAM monitor mode
 Data input/output frequency: Ï/4 or less
 Possible to read/write to a module connected to the internal/external
bus
⢠Branch address output mode
⢠Dual-function input/output pins: 149
⢠Schmitt input pins: NMI, IRQn, RES, HSTBY, FWE, TCLK, IC, IC/OC, SCK,
ADTRG
⢠Input port protection
⢠512-kbyte flash memory
⢠512 kbytes divided into 16 blocks
 Small blocks:
 Medium block:
4 kB Ã 8
32 kB Ã 1
 Large blocks:
64 kB Ã 7
⢠RAM emulation function (using 4 KB small block)
⢠Programming/erasing control program included as firmware
⢠Flash memory programming methods
 Boot mode
 User boot mode
 User program mode
 Programmer mode
⢠32 kB SRAM
Rev.2.0, 07/03, page 6 of 960
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