SH7055S Datasheet, PDF(669/1002 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SH7055S Datasheet, PDF (669/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

◁

Section 19 Advanced User Debugger (AUD)

19.1 Overview

The SH7055SF has an on-chip advanced user debugger (AUD). Use of the AUD simplifies the

construction of a simple emulator, with functions such as acquisition of branch trace data and

monitoring/tuning of on-chip RAM data.

19.1.1 Features

The AUD has the following features:

â¢ Eight input/output pins

ï£§ Data bus (AUDATA3âAUDATA0)

ï£§ AUD reset (AUDRST)

ï£§ AUD sync signal (AUDSYNC)

ï£§ AUD clock (AUDCK)

ï£§ AUD mode (AUDMD)

â¢ Two modes

Branch trace mode or RAM monitor mode can be selected by switching AUDMD.

ï£§ Branch trace mode

When the PC branches on execution of a branch instruction or generation of an interrupt in

the user program , the branch is detected by the AUD and the branch destination address is

output from AUDATA. The address is compared with the previously output address, and

4-, 8-, 16-, or 32-bit output is selected automatically according to the upper address

matching status.

ï£§ RAM monitor mode

When an address is written to AUDATA from off-chip, the data corresponding to that

address is output. If an address and data are written to AUDATA, the data is transferred to

that address.

Rev.2.0, 07/03, page 631 of 960

▷