SH7055S Datasheet, PDF (563/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Table 16.3 HCAN Registers (cont)
Chan-
nel Name
1
Master control register
General status register
Bit configuration register
Mailbox configuration
register
Transmit wait register
Transmit wait cancel
register
Transmit acknowledge
register
Abort acknowledge register
Receive complete register
Remote request register
Interrupt register
Mailbox interrupt mask
register
Interrupt mask register
Receive error counter
Transmit error counter
Unread message status
register
Local acceptance filter
mask L
Local acceptance filter
mask H
Abbre-
viation
MCR
GSR
BCR
MBCR
TXPR
TXCR
TXACK
ABACK
RXPR
RFPR
IRR
MBIMR
IMR
REC
TEC
UMSR
LAFML
LAFMH
R/W
R/W
R
R/W
R/W
Initial
Value
H'01
H'0C
H'0000
H'0100
Address
Access Size
H'FFFF E600 8 bits 16 bits
H'FFFF E601 8 bits
H'FFFF E602 8/16 bits
H'FFFF E604 8/16 bits
R/W H'0000
R/W H'0000
H'FFFF E606 8/16 bits
H'FFFF E608 8/16 bits
R/W H'0000 H'FFFF E60A 8/16 bits
R/W H'0000
R/W H'0000
R/W H'0000
R/W H'0100
R/W H'FFFF
H'FFFF E60C 8/16 bits
H'FFFF E60E 8/16 bits
H'FFFF E610 8/16 bits
H'FFFF E612 8/16 bits
H'FFFF E614 8/16 bits
R/W H'FEFF
R
H'00
R
H'00
R/W H'0000
H'FFFF E616 8/16 bits
H'FFFF E618 8 bits 16 bits
H'FFFF E619 8 bits
H'FFFF E61A 8/16 bits
R/W H'0000 H'FFFF E61C 8/16 bits
R/W H'0000 H'FFFF E61E 8/16 bits
Rev.2.0, 07/03, page 525 of 960