SH7055S Datasheet, PDF (788/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

For interrupts during download, see section 22.8.2, Interrupts during Programming/Erasing. For
the download time, see section 22.8.3, Other Notes.
Since this bit is cleared to 0 when download is completed, this bit cannot be read as 1.
Download by setting the SCO bit to 1 requires a special interrupt processing that performs bank
switching to the on-chip program storage area. Therefore, before issuing a download request (SCO
= 1), set VBR to H'00000000. Otherwise, the CPU gets out of control. Once download end is
confirmed, VBR can be changed to any other value.
Bit 0
SCO
0
1
Description
Download of the on-chip programming/erasing program to the on-chip RAM is not
executed
(Initial value)
[Clear condition] When download is completed
Request that the on-chip programming/erasing program is downloaded to the on-
chip RAM is generated
[Set conditions] When all of the following conditions are satisfied and 1 is written to
this bit
• H'A5 is written to FKEY
• During execution in the on-chip RAM
• Not in RAM emulation mode (RAMS in RAMCR = 0)
(2) Flash Program Code Select Register (FPCS)
FPCS selects the on-chip programming program to be downloaded.
Bit
:7
6
5
4
3
2
—
—
—
—
—
—
Initial value : 0
0
0
0
0
0
R/W
:R
R
R
R
R
R
1
0
—
PPVS
0
0
R
R/W
Bits 7 to 1—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 0—Program Pulse Single (PPVS): Selects the programming program.
Bit 0
PPVS
0
1
Description
On-chip programming program is not selected
[Clear condition] When transfer is completed
On-chip programming program is selected
(Initial value)
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