SH7055S Datasheet, PDF (440/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Start
Select counter clock 1
Set port-ATU-II connection 2
Set CYLR, BFR, DTR 3
Start count
4
PWM waveform output
Figure 11.60 Sample Setup Procedure for PWM Timer Operation (Channels 6 and 7)
Sample Setup Procedure for Event Counter Operation: An example of the setup procedure for
event counter operation is shown in figure 11.61.
1. Set the number of events to be counted in a general register (GR9A to GR9D). Also, if
necessary, an interrupt request can be sent to the CPU upon compare-match by making a
setting in the timer interrupt enable register (TIER).
2. Set the port control register, corresponding to the port for signal input to the event counter, to
ATU event counter input.
3. Select the event counter count edge with the EGSEL bits in the channel 9 timer control register
(TCR9A to TCR9C).
4. Input a signal to the event counter input pin.
Rev.2.0, 07/03, page 402 of 960