SH7055S Datasheet, PDF (885/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 24 Power-Down State
24.1 Overview
Three modes are provided as power-save modes, namely, the hardware standby, software standby
and sleep modes. Also, a module stop function is available to stop some modules. These standby
modes can be selected depending on applications to reduce the power consumption of the
SH7055SF.
24.1.1 Power-Down States
The power-down state is effected by the following modes:
1. Hardware standby mode
A transition to hardware standby mode is made according to the input level of the RES and
HSTBY pins.
In hardware standby mode, all SH7055SF functions are halted.
This state is exited by means of a power-on reset.
2. Software standby mode
A transition to software standby mode is made by means of software (a CPU instruction).
In software standby mode, all SH7055SF functions are halted.
This state is exited by means of a power-on reset or an NMI interrupt.
3. Sleep mode
A transition to sleep mode is made by means of a CPU instruction.
In software standby mode, basically only the CPU is halted, and all on-chip peripheral
modules operate.
This state is exited by means of a power-on reset, a manual reset, interrupt, or DMA address
error.
4. Module standby mode
Operation of the on-chip peripheral modules* which can be placed in a standby mode can be
stopped by stopping the clock supply. Clock supply to the individual modules can be
controlled by setting bits in the module standby control register (MSTCR).
Note: * AUD, H-UDI, FPU, and UBC
Rev.2.0, 07/03, page 847 of 960