SH7055S Datasheet, PDF (716/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

20.3.15 Port G Control Register (PGCR)
The port G control register (PGCR) is a 16-bit readable/writable register that selects the functions
of the 4 multiplex pins in port G.
PGCR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby mode. It is not initialized in software standby mode or sleep mode.
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
PG3MD1 PG3MD0 PG2MD1 PG2MD0 —
Initial value: 0
0
0
0
0
R/W: R/W R/W R/W R/W
R
2
1
0
PG1MD PG0MD1 PG0MD0
0
0
0
R/W R/W R/W
• Bits 15 to 8—Reserved: These bits are always read as 0. The write value should always be 0.
• Bits 7 and 6—PG3 Mode Bits 1 and 0 (PG3MD1, PG3MD0): These bits select the function of
pin PG3/IRQ3/ADTRG0.
Bit 7: PG3MD1
0
1
Bit 6: PG3MD0
0
1
0
1
Description
General input/output (PG3)
(Initial value)
Interrupt request input (IRQ3)
A/D conversion trigger input (ADTRG0)
Reserved (Do not set)
• Bits 5 and 4—PG2 Mode Bits 1 and 0 (PG2MD1, PG2MD0): These bits select the function of
pin PG2/IRQ2/ADEND.
Bit 5: PG2MD1
0
1
Bit 4: PG2MD0
0
1
0
1
Description
General input/output (PG2)
Interrupt request input (IRQ2)
A/D conversion end output (ADEND)
Reserved (Do not set)
(Initial value)
Rev.2.0, 07/03, page 678 of 960