SH7055S Datasheet, PDF (388/1002 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

• Bits 15 to 4—Reserved: These bits are always read as 0. The write value should always be 0.
• Bit 3—Compare-Match Flag 10G (CMF10G): Status flag that indicates GR10G compare-
match.
Bit 3: CMF10G
0
1
Description
[Clearing condition]
(Initial value)
When CMF10G is read while set to 1, then 0 is written to IMF10G
[Setting condition]
When TCNT10G = GR10G
• Bit 2—Compare-Match Flag 10B (CMF10B): Status flag that indicates OCR10B compare-
match.
Bit 2: CMF10B
0
1
Description
[Clearing condition]
(Initial value)
When CMF10B is read while set to 1, then 0 is written to CMF10B
[Setting condition]
When TCNT10B is incremented while TCNT10B = OCR10B
• Bit 1—Input Capture Flag 10A (ICF10A): Status flag that indicates ICR10A input capture.
Bit 1: ICF10A
0
1
Description
[Clearing condition]
(Initial value)
When ICR10A is read while set to 1, then 0 is written to ICR10A
[Setting condition]
When the TCNT10A value is transferred to ICR10A by an input capture signal
• Bit 0—Compare-Match Flag 10A (CMF10A): Status flag that indicates OCR10A compare-
match.
Bit 0: CMF10A
0
1
Description
[Clearing condition]
(Initial value)
When CMF10A is read while set to 1, then 0 is written to CMF10A
[Setting condition]
When TCNT10A = OCR10A
Rev.2.0, 07/03, page 350 of 960