MC9S12XD256MAL Datasheet, PDF (994/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)
24.0.5.7 S12X_EBI Ports, BKGD, VREGEN Pin Pull-up Control Register (PUCR)
7
6
5
4
3
2
1
R
0
PUPKE
BKPUE
PUPEE
PUPDE¹
PUPCE¹
PUPBE
W
Reset
1
1
0
1
0
0
0
= Unimplemented or Reserved
Figure 24-9. S12X_EBI Ports, BKGD, VREGEN Pin Pull-up Control Register (PUCR)
1. Register implemented, function disabled: Written values can be read back.
0
PUPAE
0
Read: Anytime in single-chip modes.
Write: Anytime, except BKPUE which is writable in special test mode only.
This register is used to enable pull-up devices for the associated ports A, B E, and K. Pull-up devices are
assigned on a per-port basis and apply to any pin in the corresponding port currently configured as an
input.
Table 24-10. PUCR Field Descriptions
Field
7
PUPKE
6
BKPUE
4
PUPEE
1
PUPBE
0
PUPAE
Description
Pull-up Port K Enable
0 Port K pull-up devices are disabled.
1 Enable pull-up devices for Port K input pins.
BKGD and VREGEN Pin Pull-up Enable
0 BKGD and V_REGEN pull-up devices are disabled.
1 Enable pull-up devices on BKGD and V_REGEN pins.
Pull-up Port E Enable
0 Port E pull-up devices on bit 7, 4–0 are disabled.
1 Enable pull-up devices for Port E input pins bits 7, 4–0.
Note: Bits 5 and 6 of Port E have pull-down devices which are only enabled during reset. This bit has no effect
on these pins.
Pull-up Port B Enable
0 Port B pull-up devices are disabled.
1 Enable pull-up devices for all Port B input pins.
Pull-up Port A Enable
0 Port A pull-up devices are disabled.
1 Enable pull-up devices for all Port A input pins.
MC9S12XDP512 Data Sheet, Rev. 2.21
996
Freescale Semiconductor