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MC9S12XD256MAL Datasheet, PDF (1054/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network
Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
25.4.2.1 Erase Verify Command
The erase verify operation will verify that the EEPROM memory is erased.
An example flow to execute the erase verify operation is shown in Figure 25-18. The erase verify command
write sequence is as follows:
1. Write to an EEPROM address to start the command write sequence for the erase verify command.
The address and data written will be ignored.
2. Write the erase verify command, 0x05, to the ECMD register.
3. Clear the CBEIF flag in the ESTAT register by writing a 1 to CBEIF to launch the erase verify
command.
After launching the erase verify command, the CCIF flag in the ESTAT register will set after the operation
has completed unless a new command write sequence has been buffered. The number of bus cycles
required to execute the erase verify operation is equal to the number of words in the EEPROM memory
plus 14 bus cycles as measured from the time the CBEIF flag is cleared until the CCIF flag is set. Upon
completion of the erase verify operation, the BLANK flag in the ESTAT register will be set if all addresses
in the EEPROM memory are verified to be erased. If any address in the EEPROM memory is not erased,
the erase verify operation will terminate and the BLANK flag in the ESTAT register will remain clear.
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MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor