MC9S12XD256MAL Datasheet, PDF(73/1348 Page) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

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MC9S12XD256MAL Datasheet, PDF (73/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

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Chapter 1 Device Overview MC9S12XD-Family

Table 1-12. Interrupt Vector Locations (Sheet 1 of 3)

Vector Address1

$FFFE

$FFFC

$FFFA

Vector base + $F8

Vector base+ $F6

Vector base+ $F4

Vector base+ $F2

Vector base+ $F0

Vector base+ $EE

Vector base + $EC

Vector base+ $EA

Vector base+ $E8

Vector base+ $E6

Vector base+ $E4

Vector base + $E2

Vector base+ $E0

Vector base+ $DE

Vector base+ $DC

Vector base + $DA

Vector base + $D8

Vector base+ $D6

XGATE

Channel ID2

â

â

â

â

â

â

â

$78

$77

$76

$75

$74

$73

$72

$71

$70

$6F

$6E

$6D

$6C

$6B

Vector base + $D4

$6A

Vector base + $D2

$69

Vector base + $D2

Vector base + $D0

$68

Vector base + $CE

$67

Vector base + $CC

$66

Vector base + $CA

$65

Vector base + $C8

$64

Vector base + $C6

$63

Vector base + $C4

$62

Vector base + $C2

Vector base + $C0

$60

Interrupt Source

System reset or illegal access reset

Clock monitor reset

COP watchdog reset

Unimplemented instruction trap

SWI

XIRQ

IRQ

Real time interrupt

Enhanced capture timer channel 0

Enhanced capture timer channel 1

Enhanced capture timer channel 2

Enhanced capture timer channel 3

Enhanced capture timer channel 4

Enhanced capture timer channel 5

Enhanced capture timer channel 6

Enhanced capture timer channel 7

Enhanced capture timer overï¬ow

Pulse accumulator A overï¬ow

Pulse accumulator input edge

SPI0

SCI0

CCR

Mask

None

None

None

None

None

X Bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

SCI1

I bit

ATD0

I bit

Reserved

ATD1

I bit

Port J

I bit

Port H

I bit

Modulus down counter underï¬ow

I bit

Pulse accumulator B overï¬ow

I bit

CRG PLL lock

I bit

CRG self-clock mode

I bit

Reserved

IIC0 bus

I bit

Local Enable

None

PLLCTL (CME, SCME)

COP rate select

None

None

None

IRQCR (IRQEN)

CRGINT (RTIE)

TIE (C0I)

TIE (C1I)

TIE (C2I)

TIE (C3I)

TIE (C4I)

TIE (C5I)

TIE (C6I)

TIE (C7I)

TSRC2 (TOF)

PACTL (PAOVI)

PACTL (PAI)

SPI0CR1 (SPIE, SPTIE)

SCI0CR2

(TIE, TCIE, RIE, ILIE)

SCI1CR2

(TIE, TCIE, RIE, ILIE)

ATD0CTL2 (ASCIE)

ATD1CTL2 (ASCIE)

PIEJ (PIEJ7-PIEJ0)

PIEH (PIEH7-PIEH0)

MCCTL(MCZI)

PBCTL(PBOVI)

CRGINT(LOCKIE)

CRGINT (SCMIE)

IBCR0 (IBIE)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

73

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