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MC9S12XD256MAL Datasheet, PDF (563/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network
Chapter 14 Voltage Regulator (S12VREG3V3V5)
Table 14-8. Selectable Autonomous Periodical Interrupt Periods
APICLK
APIR[11:0]
Selected Period
0
000
0
001
0
002
0
003
0
004
0
005
0.2 ms1
0.4 ms1
0.6 ms1
0.8 ms1
1.0 ms1
1.2 ms1
0
.....
0
FFD
0
FFE
0
FFF
.....
818.8 ms1
819 ms1
819.2 ms1
1
000
2 * bus clock period
1
001
4 * bus clock period
1
002
6 * bus clock period
1
003
8 * bus clock period
1
004
10 * bus clock period
1
005
12 * bus clock period
1
.....
.....
1
FFD
8188 * bus clock period
1
FFE
8190 * bus clock period
1
FFF
8192 * bus clock period
1 When trimmed within specified accuracy. See electrical specifications for details.
You can calculate the selected period depending of APICLK as:
Period = 2*(APIR[11:0] + 1) * 0.1 ms or period = 2*(APIR[11:0] + 1) * bus clock period
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
563