MC9S12XD256MAL Datasheet, PDF (440/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
7
R RXERR7
W
Reset:
0
6
RXERR6
5
RXERR5
0
0
= Unimplemented
4
RXERR4
0
3
RXERR3
0
2
RXERR2
0
1
RXERR1
0
0
RXERR0
0
Figure 10-18. MSCAN Receive Error Counter (CANRXERR)
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and
INITAK = 1)
Write: Unimplemented
NOTE
Reading this register when in any other mode other than sleep or
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
10.3.2.16 MSCAN Transmit Error Counter (CANTXERR)
This register reflects the status of the MSCAN transmit error counter.
7
R TXERR7
W
Reset:
0
6
TXERR6
5
TXERR5
0
0
= Unimplemented
4
TXERR4
0
3
TXERR3
0
2
TXERR2
0
1
TXERR1
0
0
TXERR0
0
Figure 10-19. MSCAN Transmit Error Counter (CANTXERR)
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and
INITAK = 1)
Write: Unimplemented
NOTE
Reading this register when in any other mode other than sleep or
initialization mode, may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
MC9S12XDP512 Data Sheet, Rev. 2.21
440
Freescale Semiconductor