MC9S12XD256MAL Datasheet, PDF (874/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.66 Port AD1 Data Register 0 (PT0AD1)
7
R
PT0AD123
W
Reset
0
6
5
4
3
2
PT0AD122 PT0AD121 PT0AD120 PT0AD119 PT0AD118
0
0
0
0
0
Figure 22-68. Port AD1 Data Register 0 (PT0AD1)
1
PT0AD117
0
0
PT0AD116
0
Read: Anytime.
Write: Anytime.
This register is associated with AD1 pins PAD[23:16]. These pins can also be used as general purpose I/O.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
22.3.2.67 Port AD1 Data Register 1 (PT1AD1)
7
R
PT1AD115
W
6
PT1AD114
5
PT1AD113
4
PT1AD112
3
PT1AD111
2
PT1AD110
1
PT1AD19
0
PT1AD18
Reset
0
0
0
0
0
0
0
0
Figure 22-69. Port AD1 Data Register 1 (PT1AD1)
Read: Anytime.
Write: Anytime.
This register is associated with AD1 pins PAD[15:08]. These pins can also be used as general purpose I/O.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
MC9S12XDP512 Data Sheet, Rev. 2.21
876
Freescale Semiconductor