MC9S12XD256MAL Datasheet, PDF (1328/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Appendix G Detailed Register Map
Detailed MSCAN Foreground Receive and Transmit Buffer Layout (continued)
Address Name
Extended ID R
0xXX0x ^{CANxTIDR1 W}
XX10 Standard ID R
W
Extended ID R
CANxTIDR2 W
0xXX12
Standard ID R
W
Extended ID R
CANxTIDR3 W
0xXX13
Standard ID R
W
0xXX14
–
0xXX1B
CANxTDSR0– ^R
CANxTDSR7 ^W
R
0xXX1C CANxTDLR
W
R
0xXX1D CANxTTBPR
W
R
0xXX1E CANxTTSRH
W
R
0xXX1F CANxTTSRL
W
Bit 7
ID20
ID2
ID14
ID6
DB7
PRIO7
TSR15
TSR7
Bit 6
ID19
ID1
ID13
ID5
DB6
PRIO6
TSR14
TSR6
Bit 5
ID18
ID0
ID12
ID4
DB5
PRIO5
TSR13
TSR5
Bit 4
SRR=1
RTR
ID11
ID3
DB4
PRIO4
TSR12
TSR4
Bit 3
IDE=1
IDE=0
ID10
ID2
DB3
DLC3
PRIO3
TSR11
TSR3
Bit 2
ID17
ID9
ID1
DB2
DLC2
PRIO2
TSR10
TSR2
Bit 1
ID16
ID8
ID0
DB1
DLC1
PRIO1
TSR9
TSR1
Bit 0
ID15
ID7
RTR
DB0
DLC0
PRIO0
TSR8
TSR0
0x0180–0x01BF Freescale Scalable CAN — MSCAN (CAN1) Map (Sheet 1 of 3)
Address Name
Bit 7
0x0180
0x0181
0x0182
0x0183
0x0184
0x0185
0x0186
0x0187
0x0188
R
CAN1CTL0
RXFRM
W
R
CAN1CTL1
CANE
W
R
CAN1BTR0
SJW1
W
R
CAN1BTR1
SAMP
W
R
CAN1RFLG
WUPIF
W
R
CAN1RIER
WUPIE
W
R
0
CAN1TFLG
W
R
0
CAN1TIER
W
R
0
CAN1TARQ
W
Bit 6
RXACT
Bit 5
CSWAI
Bit 4
SYNCH
Bit 3
TIME
CLKSRC LOOPB LISTEN BORM
Bit 2
WUPE
WUPM
Bit 1
SLPRQ
SLPAK
SJW0
BRP5
BRP4
BRP3
BRP2
BRP1
TSEG22 TSEG21 TSEG20 TSEG13 TSEG12 TSEG11
RSTAT1 RSTAT0 TSTAT1 TSTAT0
CSCIF
OVRIF
CSCIE
0
0
0
RSTATE1 RSTATE0 TSTATE1 TSTATE0 OVRIE
0
0
0
TXE2
TXE1
0
0
0
TXEIE2 TXEIE1
0
0
0
ABTRQ2 ABTRQ1
Bit 0
INITRQ
INITAK
BRP0
TSEG10
RXF
RXFIE
TXE0
TXEIE0
ABTRQ0
1330
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor