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MC9S12XD256MAL Datasheet, PDF (354/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network
Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
Bus Clock
P0
P1
P2
P3
P4
P5
P6
P7
÷1, 2, 3, ... 256
Timer
Prescaler
16-Bit Free-Running
16 BITMMaiAnINTimTIeMrER
Bus Clock
÷ 1, 2, 3, ... 256
Modulus
Prescaler
16-Bit Load Register
16-Bit Modulus
Down Counter
Pin Logic
Delay
Counter EDG0
8, 12, 16, ... 1024
Pin Logic
Delay
Counter EDG1
8, 12, 16, ... 1024
Pin Logic
Delay
Counter EDG2
8, 12, 16, ... 1024
Pin Logic
Delay
Counter EDG3
8, 12, 16, ... 1024
Comparator
TC0 Capture/Compare Reg.
TC0H Hold Reg.
Comparator
TC1 Capture/Compare Reg.
TC1H Hold Reg.
Comparator
TC2 Capture/Compare Reg.
TC2H Hold Reg.
Comparator
TC3 Capture/Compare Reg.
TC3H Hold Reg.
0 RESET
PAC0
PA0H Hold Reg.
0 RESET
PAC1
PA1H Hold Reg.
0 RESET
PAC2
PA2H Hold Reg.
0 RESET
PAC3
PA3H Hold Reg.
Pin Logic EDG4
EDG0
MUX
Comparator
TC4 Capture/Compare Reg.
LATQ, BUFEN
(Queue Mode)
SH04
Pin Logic EDG5
EDG1
MUX
SH15
Pin Logic EDG6
EDG2
MUX
SH26
Pin Logic EDG7
EDG3
SH37
MUX
Comparator
TC5 Capture/Compare Reg.
Read TC3H
Hold Reg.
Comparator
TC6 Capture/Compare Reg.
Read TC2H
Hold Reg.
Read TC1H
Hold Reg.
Comparator
TC7 Capture/Compare Reg.
Read TC0H
Hold Reg.
Figure 7-68. Detailed Timer Block Diagram in Queue Mode when PRNT = 1
MC9S12XDP512 Data Sheet, Rev. 2.21
354
Freescale Semiconductor