MC9S12XD256MAL Datasheet, PDF (1126/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
START
Tbus < 1µs?
no
ALL COMMANDS IMPOSSIBLE
yes
PRDIV8=0 (reset)
oscillator_clock
no
12.8MHz?
yes
PRDIV8=1
PRDCLK=oscillator_clock/8
PRDCLK=oscillator_clock
PRDCLK[MHz]*(5+Tbus[µs]) ^no
an integer?
yes
FDIV[5:0]=INT(PRDCLK[MHz]*(5+Tbus[µs]))
FDIV[5:0]=PRDCLK[MHz]*(5+Tbus[µs])-1
TRY TO DECREASE Tbus FCLK=(PRDCLK)/(1+FDIV[5:0])
1128
yes
1/FCLK[MHz] + Tbus[µs] > 5
AND
END
FCLK > 0.15MHz
?
no
yes
FDIV[5:0] > 4?
no
ALL COMMANDS IMPOSSIBLE
Figure 27-24. Determination Procedure for PRDIV8 and FDIV Bits
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor