MC9S12XD256MAL Datasheet, PDF (987/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Register
Name
DDRS R
W
Bit 7
DDRS7
6
DDRS6
5
DDRS5
4
DDRS4
3
DDRS3
2
DDRS2
1
DDRS1
Bit 0
DDRS0
RDRS R
RDRS7
W
RDRS6
RDRS5
RDRS4
RDRS3
RDRS2
RDRS1
RDRS0
PERS R
PERS7
W
PERS6
PERS5
PERS4
PERS3
PERS2
PERS1
PERS0
PPSS R
PPSS7
W
PPSS6
PPSS5
PPSS4
PPSS3
PPSS2
PPSS1
PPSS0
WOMS R
WOMS7
W
WOMS6
WOMS5
WOMS4
WOMS3
WOMS2
WOMS1
WOMS0
Reserved R
0
0
0
0
0
0
0
0
W
PTM R
PTM7
W
PTM6
PTM5
PTM4
PTM3
PTM2
PTM1
PTM0
PTIM R PTIM7
W
PTIM6
PTIM5
PTIM4
PTIM3
PTIM2
PTIM1
PTIM0
DDRM R
DDRM7
W
DDRM6
DDRM5
DDRM4
DDRM3
DDRM2
DDRM1
DDRM0
RDRM R
RDRM7
W
RDRM6
RDRM5
RDRM4
RDRM3
RDRM2
RDRM1
RDRM0
PERM R
PERM7
W
PERM6
PERM5
PERM4
PERM3
PERM2
PERM1
PERM0
PPSM R
PPSM7
W
PPSM6
PPSM5
PPSM4
PPSM3
PPSM2
PPSM1
PPSM0
WOMM R
WOMM7
W
WOMM6
WOMM5
WOMM4
WOMM3
WOMM2
WOMM1
WOMM0
MODRR R
0
W
MODRR6¹ MODRR5 MODRR4 MODRR3 MODRR2 MODRR1 MODRR0
PTP R
PTP7
W
PTP6
PTP5
PTP4
PTP3
PTP2
PTP1
PTP0
= Unimplemented or Reserved
Figure 24-2. PIM Register Summary (Sheet 4 of 7)