MC9S12XD256MAL Datasheet, PDF (102/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 2 Clocks and Reset Generator (S12CRGV6)
A number greater equal than 4096 rising OSCCLK edges within a check window is called osc ok. Note that
osc ok immediately terminates the current check window. See Figure 2-19 as an example.
check window
1
2
3
VCO
Clock
49999
OSCCLK
12345
4096
4095
osc ok
Figure 2-19. Check Window Example
The sequence for clock quality check is shown in Figure 2-20.
50000
Clock OK
CM fail
POR
LVR
exit full stop
SCME = 1 & ^yes _{num = 0}
FSTWKP = 1
?
no
no
Enter SCM
Clock Monitor Reset
FSTWKP = 0
?
yes
num = 50
check window
osc ok
no
?
yes
SCM
yes
active?
no
Enter SCM
yes
num=num–1
yes
no
num > 0
?
no
SCM
active?
yes
SCME=1
no
?
num = 0
Switch to OSCCLK
Exit SCM
Figure 2-20. Sequence for Clock Quality Check
MC9S12XDP512 Data Sheet, Rev. 2.21
102
Freescale Semiconductor