MC9S12XD256MAL Datasheet, PDF (863/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.51 Port H Polarity Select Register (PPSH)
R
W
Reset
7
PPSH7
0
6
PPSH6
5
PPSH5
4
PPSH4
3
PPSH3
2
PPSH2
0
0
0
0
0
Figure 22-53. Port H Polarity Select Register (PPSH)
1
PPSH1
0
0
PPSH0
0
Read: Anytime.
Write: Anytime.
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting
a pull-up or pull-down device if enabled.
Table 22-48. PPSH Field Descriptions
Field
Description
7–0
PPSH[7:0]
Polarity Select Port H
0 Falling edge on the associated port H pin sets the associated flag bit in the PIFH register.
A pull-up device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
1 Rising edge on the associated port H pin sets the associated flag bit in the PIFH register.
A pull-down device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
22.3.2.52 Port H Interrupt Enable Register (PIEH)
R
W
Reset
7
PIEH7
0
6
PIEH6
5
PIEH5
4
PIEH4
3
PIEH3
2
PIEH2
0
0
0
0
0
Figure 22-54. Port H Interrupt Enable Register (PIEH)
1
PIEH1
0
0
PIEH0
0
Read: Anytime.
Write: Anytime.
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated with
Port H.
Table 22-49. PIEH Field Descriptions
Field
Description
7–0
PIEH[7:0]
Interrupt Enable Port H
0 Interrupt is disabled (interrupt flag masked).
1 Interrupt is enabled.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
865