MC9S12XD256MAL Datasheet, PDF (88/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 2 Clocks and Reset Generator (S12CRGV6)
2.3.2.5 CRG Interrupt Enable Register (CRGINT)
This register enables CRG interrupt requests.
R
W
Reset
7
RTIE
0
6
ILAF
1
5
4
3
0
0
LOCKIE
0
0
0
2
1
0
0
0
SCMIE
0
0
0
1. ILAF is set to 1 when an illegal address reset occurs. Unaffected by system reset. Cleared by power on or low
voltage reset.
= Unimplemented or Reserved
Figure 2-8. CRG Interrupt Enable Register (CRGINT)
Read: Anytime
Write: Anytime
Table 2-3. CRGINT Field Descriptions
Field
7
RTIE
6
ILAF
4
LOCKIE
1
SCMIE
Description
Real Time Interrupt Enable Bit
0 Interrupt requests from RTI are disabled.
1 Interrupt will be requested whenever RTIF is set.
Illegal Address Reset Flag — ILAF is set to 1 when an illegal address reset occurs. Refer to S12XMMC Block
Guide for details. This flag can only be cleared by writing a 1. Writing a 0 has no effect.
0 Illegal address reset has not occurred.
1 Illegal address reset has occurred.
Lock Interrupt Enable Bit
0 LOCK interrupt requests are disabled.
1 Interrupt will be requested whenever LOCKIF is set.
Self ClockMmode Interrupt Enable Bit
0 SCM interrupt requests are disabled.
1 Interrupt will be requested whenever SCMIF is set.
MC9S12XDP512 Data Sheet, Rev. 2.21
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Freescale Semiconductor