MC9S12XD256MAL Datasheet, PDF (840/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.20 Port T Reduced Drive Register (RDRT)
R
W
Reset
7
RDRT7
0
6
RDRT6
5
RDRT5
4
RDRT4
3
RDRT3
2
RDRT2
0
0
0
0
0
Figure 22-22. Port T Reduced Drive Register (RDRT)
1
RDRT1
0
0
RDRT0
0
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port T output pin as either full or reduced. If the port is
used as input this bit is ignored.
Table 22-24. RDRT Field Descriptions
Field
Description
7–0
Reduced Drive Port T
RDRT[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
22.3.2.21 Port T Pull Device Enable Register (PERT)
R
W
Reset
7
PERT7
0
6
PERT6
5
PERT5
4
PERT4
3
PERT3
2
PERT2
1
PERT1
0
0
0
0
0
0
Figure 22-23. Port T Pull Device Enable Register (PERT)
0
PERT0
0
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input.
This bit has no effect if the port is used as output. Out of reset no pull device is enabled.
Table 22-25. PERT Field Descriptions
Field
Description
7–0
Pull Device Enable Port T
PERT[7:0] 0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
MC9S12XDP512 Data Sheet, Rev. 2.21
842
Freescale Semiconductor