MC9S12XD256MAL Datasheet, PDF (710/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 19 S12X Debug (S12XDBGV2) Module
19.3.1.11.4 Debug Comparator Address Low Register (DBGXAL)
0x002B
7
6
5
4
3
2
1
0
R
Bit 7
6
5
4
3
2
1
Bit 0
W
Reset
0
0
0
0
0
0
0
0
Figure 19-17. Debug Comparator Address Low Register (DBGXAL)
Read: Anytime
Write: Anytime when DBG not armed.
Table 19-31. DBGXAL Field Descriptions
Field
7–0
Bits [7:0]
Description
Comparator Address Low Compare Bits — The comparator address low compare bits control whether the
selected comparator will compare the address bus bits [7:0] to a logic 1 or logic 0.
0 Compare corresponding address bit to a logic 0
1 Compare corresponding address bit to a logic 1
19.3.1.11.5 Debug Comparator Data High Register (DBGXDH)
0x002C
7
6
5
4
3
2
R
Bit 15
14
13
12
11
10
W
Reset
0
0
0
0
0
0
1
0
9
Bit 8
0
0
Figure 19-18. Debug Comparator Data High Register (DBGXDH)
Read: Anytime
Write: Anytime when DBG not armed.
Table 19-32. DBGXDH Field Descriptions
Field
Description
7–0
Bits [15:8]
Comparator Data High Compare Bits — The comparator data high compare bits control whether the selected
comparator compares the data bus bits [15:8] to a logic 1 or logic 0. The comparator data compare bits are only
used in comparison if the corresponding data mask bit is logic 1. This register is available only for comparators
A and C.
0 Compare corresponding data bit to a logic 0
1 Compare corresponding data bit to a logic 1
MC9S12XDP512 Data Sheet, Rev. 2.21
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Freescale Semiconductor