MC9S12XD256MAL Datasheet, PDF(194/1348 Page) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

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MC9S12XD256MAL Datasheet, PDF (194/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

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Chapter 6 XGATE (S12XGATEV2)

Table 6-4. XGIV Field Descriptions

Field

127â9

XGIF[78:9]

Description

Channel Interrupt Flags â These bits signal pending channel interrupts. They can only be set by the RISC

core. Each ï¬ag can be cleared by writing a "1" to its bit location. Unimplemented interrupt ï¬ags will always read

"0". Refer to Section âInterruptsâ of the SoC Guide for a list of implemented Interrupts.

Read:

0 Channel interrupt is not pending

1 Channel interrupt is pending if XGIE is set

Write:

0 No effect

1 Clears the interrupt ï¬ag

NOTE

Suggested Mnemonics for accessing the interrupt ï¬ag vector on a word

basis are:

XGIF_7F_70 (XGIF[127:112]),

XGIF_6F_60 (XGIF[111:96]),

XGIF_5F_50 (XGIF[95:80]),

XGIF_4F_40 (XGIF[79:64]),

XGIF_3F_30 (XGIF[63:48]),

XGIF_2F_20 (XGIF[47:32]),

XGIF_1F_10 (XGIF[31:16]),

XGIF_0F_00 (XGIF[15:0])

MC9S12XDP512 Data Sheet, Rev. 2.21

194

Freescale Semiconductor

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