MC9S12XD256MAL Datasheet, PDF (1021/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Table 24-50. PERJ Field Descriptions
Field
Description
7–0
Pull Device Enable Port J
PERJ[7:6] 0 Pull-up or pull-down device is disabled.
PERJ[1:0] 1 Either a pull-up or pull-down device is enabled.
24.0.5.55 Port J Polarity Select Register (PPSJ)
R
W
Reset
7
PPSJ7
0
6
5
4
3
2
0
0
0
0
PPSJ6
0
0
0
0
0
= Unimplemented or Reserved
Figure 24-57. Port J Polarity Select Register (PPSJ)
1
PPSJ1
0
0
PPSJ0
0
Read: Anytime.
Write: Anytime.
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as
selecting a pull-up or pull-down device if enabled.
Table 24-51. PPSJ Field Descriptions
Field
Description
7–0
PPSJ[7:6]
PPSJ[1:0]
Polarity Select Port J
0 Falling edge on the associated port J pin sets the associated flag bit in the PIFJ register.
A pull-up device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as general purpose input or as IIC port.
1 Rising edge on the associated port J pin sets the associated flag bit in the PIFJ register.
A pull-down device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as input.
24.0.5.56 Port J Interrupt Enable Register (PIEJ)
R
W
Reset
7
PIEJ7
0
6
5
4
3
2
0
0
0
0
PIEJ6
0
0
0
0
0
= Unimplemented or Reserved
Figure 24-58. Port J Interrupt Enable Register (PIEJ)
1
PIEJ1
0
0
PIEJ0
0
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated
with Port J.