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MC9S12XD256MAL Datasheet, PDF (281/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network
Chapter 6 XGATE (S12XGATEV2)
SUBH
Subtract Immediate 8 bit Constant
(High Byte)
SUBH
Operation
RD – IMM8:$00 ⇒ RD
Subtracts a signed immediate 8 bit constant from the content of high byte of register RD and using binary
subtraction and stores the result in the high byte of destination register RD. This instruction can be used
after an SUBL for a 16 bit immediate subtraction.
Example:
SUBL
SUBH
R2,#LOWBYTE
R2,#HIGHBYTE
; R2 = R2 - 16 bit immediate
CCR Effects
NZVC
∆∆∆∆
N: Set if bit 15 of the result is set; cleared otherwise.
Z: Set if the result is $0000; cleared otherwise.
V: Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RD[15]old & IMM8[7] & RD[15]new | RD[15]old & IMM8[7] & RD[15]new
C: Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]old & IMM8[7] | RD[15]old & RD[15]new | IMM8[7] & RD[15]new
Code and CPU Cycles
Source Form
SUBH RD, #IMM8
Address
Mode
IMM8
11001
Machine Code
RD
IMM8
Cycles
P
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
281