MC9S12XD256MAL Datasheet, PDF(53/1348 Page) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

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MC9S12XD256MAL Datasheet, PDF (53/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

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Chapter 1 Device Overview MC9S12XD-Family

Table 1-7. Signal Properties Summary (Sheet 2 of 4)

Pin

Name

Function 1

Pin

Name

Function 2

Pin

Name

Function 3

Pin

Name

Function 4

Pin

Name

Function 5

Power

Supply

Internal Pull

Resistor

CTRL

Reset

State

Description

PE0

PH7

PH6

PH5

PH4

PH3

PH2

PH1

PH0

PJ7

PJ6

PJ5

PJ4

PJ2

PJ1

PJ0

PK7

PK[5:4]

PK7

PK[6:4]

PK3

XIRQ

â

KWH7

SS2

KWH6

SCK2

KWH5

MOSI2

KWH4

MISO2

KWH3

SS1

KWH2

SCK1

KWH1

MOSI1

KWH0

MISO1

KWJ7 TXCAN4

KWJ6 RXCAN4

KWJ5

SCL1

KWJ4

SDA1

KWJ2

CS1

KWJ1

TXD2

KWJ0

RXD2

â

â

EWAIT

â

â

ROMCTL

ADDR

[22:20]

ACC[2:0]

ADDR19 IQSTAT3

â

TXD5

RXD5

TXD4

RXD4

â

â

â

â

SCL0

SDA0

CS2

CS0

â

â

CS3

â

â

â

â

â

â

â

â

â

â

â

â

â

â

TXCAN0

RXCAN0

â

â

â

â

â

â

â

â

â

â

VDDR

PUCR

Up Port E input, non-maskable

interrupt

VDDR PERH/PPSH Disabled Port H I/O, interrupt, SS of

SPI2, TXD of SCI5

VDDR

PERH/ Disabled Port H I/O, interrupt, SCK of

PPSH

SPI2, RXD of SCI5

VDDR

PERH/ Disabled Port H I/O, interrupt, MOSI

PPSH

of SPI2, TXD of SCI4

VDDR PERH/PPSH Disabled Port H I/O, interrupt, MISO

of SPI2, RXD of SCI4

VDDR PERH/PPSH Disabled Port H I/O, interrupt, SS of

SPI1

VDDR PERH/PPSH Disabled Port H I/O, interrupt, SCK of

SPI1

VDDR PERH/PPSH Disabled Port H I/O, interrupt, MOSI

of SPI1

VDDR PERH/PPSH Disabled Port H I/O, interrupt, MISO

of SPI1

VDDX

PERJ/

PPSJ

Up Port J I/O, interrupt, TX of

CAN4, SCL of IIC0, TX of

CAN0

VDDX

PERJ/

PPSJ

Up Port J I/O, interrupt, RX of

CAN4, SDA of IIC0, RX of

CAN0

VDDX

PERJ/

PPSJ

Up Port J I/O, interrupt, SCL of

IIC1, chip select 2

VDDX

PERJ/

PPSJ

Up Port J I/O, interrupt, SDA of

IIC1, chip select 0

VDDX

PERJ/

PPSJ

Up Port J I/O, interrupt, chip

select 1

VDDX

PERJ/

PPSJ

Up Port J I/O, interrupt, TXD of

SCI2

VDDX

PERJ/

PPSJ

Up Port J I/O, interrupt, RXD of

SCI2

VDDX

VDDX

VDDX

PUCR

PUCR

PUCR

Up Port K I/O

Up Port K I/O

Up Port K I/O, EWAIT input,

ROM on control

VDDX

PUCR

Up Port K I/O, extended

addresses, access source

for external access

VDDX

PUCR

Up Extended address, PIPE

status

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

53

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