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| MC9S12XD256MAL Datasheet, PDF (1146/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network | |||
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Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
Table 27-21. Flash Interrupt Sources
Interrupt Source
Flash Address, Data and Command Buffers empty
All Flash commands completed
Interrupt Flag
CBEIF
(FSTAT register)
CCIF
(FSTAT register)
Local Enable
CBEIE
(FCNFG register)
CCIE
(FCNFG register)
Global (CCR) Mask
I Bit
I Bit
NOTE
Vector addresses and their relative interrupt priority are determined at the
MCU level.
27.8.1 Description of Flash Interrupt Operation
The logic used for generating interrupts is shown in Figure 27-32.
The Flash module uses the CBEIF and CCIF ï¬ags in combination with the CBIE and CCIE enable bits to
generate the Flash command interrupt request.
CBEIF
CBEIE
Flash Command Interrupt Request
CCIF
CCIE
Figure 27-32. Flash Interrupt Implementation
For a detailed description of the register bits, refer to Section 27.3.2.4, âFlash Conï¬guration Register
(FCNFG)â and Section 27.3.2.6, âFlash Status Register (FSTAT)â .
1148
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
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