MC9S12XD256MAL Datasheet, PDF (67/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Mnemonic
V_{DD1, 2}
V_{SS1, 2}
V_DDR1
V_SSR1
V_DDX1
V_SSX1
V_DDX2
V_SSX2
V_DDR2
V_SSR2
V_DDA
V_SSA
V_RL
V_RH
V_DDPLL
V_SSPLL
Chapter 1 Device Overview MC9S12XD-Family
Table 1-8. MC9S12XD Family Power and Ground Connection Summary
144-Pin
LQFP
15, 87
16, 88
53
52
139
138
26
27
82
81
107
110
Pin Number
112-Pin
LQFP
13, 65
14, 66
41
40
107
106
N.A.
N.A.
N.A.
N.A.
83
86
80-Pin
QFP
9, 49
10, 50
29
28
77
76
N.A.
N.A.
N.A.
N.A.
59
62
109
85
61
108
84
60
55
43
31
57
45
33
Nominal
Voltage
Description
2.5 V
0V
5.0 V
0V
5.0 V
0V
5.0 V
0V
5.0 V
0V
5.0 V
0V
0V
5.0 V
2.5 V
0V
Internal power and ground generated by
internal regulator
External power and ground, supply to pin
drivers and internal voltage regulator
External power and ground, supply to pin
drivers
External power and ground, supply to pin
drivers
External power and ground, supply to pin
drivers
Operating voltage and ground for the
analog-to-digital converters and the
reference for the internal voltage regulator,
allows the supply voltage to the A/D to be
bypassed independently.
Reference voltages for the analog-to-digital
converter.
Provides operating voltage and ground for
the phased-locked loop. This allows the
supply voltage to the PLL to be bypassed
independently. Internal power and ground
generated by internal regulator.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
67