MC9S12XD256MAL Datasheet, PDF (349/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
7.3.2.31 Timer Input Capture Holding Registers 0–3 (TCxH)
15
R TC15
14
TC14
13
TC13
12
TC12
11
TC11
10
TC10
9
TC9
8
TC8
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-57. Timer Input Capture Holding Register 0 High (TC0H)
7
R TC7
6
TC6
5
TC5
4
TC4
3
TC3
2
TC2
1
TC1
0
TC0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-58. Timer Input Capture Holding Register 0 Low (TC0H)
15
R TC15
14
TC14
13
TC13
12
TC12
11
TC11
10
TC10
9
TC9
8
TC8
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-59. Timer Input Capture Holding Register 1 High (TC1H)
7
R TC7
6
TC6
5
TC5
4
TC4
3
TC3
2
TC2
1
TC1
0
TC0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-60. Timer Input Capture Holding Register 1 Low (TC1H)
15
R TC15
14
TC14
13
TC13
12
TC12
11
TC11
10
TC10
9
TC9
8
TC8
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-61. Timer Input Capture Holding Register 2 High (TC2H)
7
R TC7
6
TC6
5
TC5
4
TC4
3
TC3
2
TC2
1
TC1
0
TC0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-62. Timer Input Capture Holding Register 2 Low (TC2H)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
349