MC9S12XD256MAL Datasheet, PDF (666/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 18 Memory Mapping Control (S12XMMCV3)
18.3.2.7 EEPROM Page Index Register (EPAGE)
Address: 0x0017
7
R
EP7
W
6
EP6
5
EP5
4
EP4
3
EP3
2
EP2
1
EP1
0
EP0
Reset
1
1
1
1
1
1
1
0
Figure 18-13. EEPROM Page Index Register (EPAGE)
Read: Anytime
Write: Anytime
These eight index bits are used to page 1 KByte blocks into the EEPROM page window located in the local
(CPU or BDM) memory map from address 0x0800 to address 0x0BFF (see Figure 18-14). This supports
accessing up to 256 Kbytes of EEPROM (in the Global map) within the 64 KByte Local map. The
EEPROM page index register is effectively used to construct paged EEPROM addresses in the Local map
format.
CAUTION
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Global Address [22:0]
0
0 1 0 0 ^{Bit17 Bit16}
Bit10 Bit9
Bit0
EPAGE Register [7:0]
Address [9:0]
Address: CPU Local Address
or BDM Local Address
Figure 18-14. EPAGE Address Mapping
Table 18-13. EPAGE Field Descriptions
Field
7–0
EP[7:0]
Description
EEPROM Page Index Bits 7–0 — These page index bits are used to select which of the 256 EEPROM array
pages is to be accessed in the EEPROM Page Window.
The reset value of 0xFE ensures that there is a linear EEPROM space available between addresses 0x0800
and 0x0FFF out of reset.
The fixed 1K page 0x0C00–0x0FFF of EEPROM is equivalent to page 255 (page number 0xFF).
MC9S12XDP512 Data Sheet, Rev. 2.21
666
Freescale Semiconductor